Introduction to VLSI Design Flow

This book is an absolutely wonderful addition to the other books on VLSI that I have. No other book so comprehensively describes the flow as well as (and this I think may be it's key contribution) summarizes so many notions and so much jargon which is taken for granted in industry. I also think the chapter describing the Verilog simulation environment is extremely strong (Chapter 9).I see that one other reviewer had a number of criticisms for the book, many of which are well taken. About those I would say two things though:(1) While it's true that there are some errors, these do not in my mind at all detract from the content conveyed to the reader. So far (I am 11 chapters in) they have been merely cosmetic in nature. See also the errata posted on the book website. I have personally found that the writing is actually quite lucid.(2) As for criticisms regarding content which has been omitted, I can't really speak to that given that I'm much more of a rookie in the industry than the other reviewer. However, I would say that for someone who is not super experienced in the industry, there is more than enough in this book to learn. Unless a prospective reader is a seasoned industry veteran, I would seriously doubt there is nothing new to be found in here.

I lecture on microelectronics, and was intrigued by the announcement of this text. Unfortunately, it fell well short of my expectations.A text on VLSI design in 2023 should cover topics of current interest and importance. This 689-page text either omits key topics completely or covers them only superficially, offering pointers to other technical references. Examples include:1) FinFET-based design: how has the quantization of device sizes impacted circuit design (absent)2) library IP design and characterization methodology (pointers to a reference on LEF semantics)3) implications of multi-patterning lithography throughout the design flow (absent)4) electromigration, with self-heating (superficial coverage)5) noise characterization and post-route analysis (superficial)6) chip reliability and end-of-life analysis, such as NBTI and PBTI (absent)and many more.The 689 pages include many cases of repetitive coverage -- there are lots of footnotes directing readers to the same topic in other chapters. And, there are pages with coverage of topics that are not particularly relevant to modern VLSI designs, such as channel routing algorithms between rows of standard cells in a two-level metal design.On the plus side, the references at the end of each chapter are a nice list, although this is by necessity since many descriptions simply point to a reference. For example, Chapter 28 on Routing has 21 pages of text with 53 references. Also, for a text published in 2023, I would have expected more recent technical articles in the reference list.Lastly, it was bothersome to see so many typesetting errors, usually when switching fonts between regular text and a highlighted keyword or phrase. For example, the logic equation on page 186 is barely legible -- that tells me that no one bothered to proofread the text before publishing.Summary: Do not recommend.